Research

Research Projects

2012 (YEAR 4) PROJECTS (A=Arizona State, S=Southern Illinois.Year.PI initials)


A1.Y4.GF	Temporal Logic Testing for Stochastic Cyber-Physical Systems
A2.Y4.KC.GF	Parallelization of Embedded Control Applications on Mulit-core Architectures: A Case Study
A3.Y4.AS	Improving Usability of Mulit-core DSPs with Scratch Pad Memories
A4.Y4.SV.HB	Feasibility of Integrating Memristors and Threshold Logic for Compact, Low Power Digital Circuits
A5.Y4.KC	Development of Electronic System-level Hardware-Software Co-synthesis Approach
A6.Y4.SV	Design of an Optimal Closed Loop Controller and its Implementation in an OS Scheduler for Dynamic Energy Management in Heterogeneous Multi-Core Processors
JOINT.Y4.ST.SV.HW	Synthesis and Design of Robust Threshold Logic Circuits
S1.Y4.YC	Development of Fast Grain Quality Measurement System (Phase III)
S2.Y4.LG	Object Identification & Tracking for Embedded Systems
S3.Y4.HR.DK	Towards Predictable Execution of Safety Critical Tasks on Mixed-criticality Multi-core Platforms
S4.Y4.CH.FH.PC	Pilot Study of Energy Harvesting Devices towards the Development of a Prototype
S5.Y4.CH.HW	Resolver Sensor Conditioning Size Reduction
S6.Y4.MS	All-optical Embedded Fiber-optic Up/down-links for Motor Controller
S7.Y4.ST	Critical Path Analysis of Multicore Systems using BDDs
S8.Y4.ST	High Quality Power-aware Testing Methodologies for Integrated Circuits
S9.Y4.HW.ST	Adaptive Compressive Sensing Techniques for Low Power Sensors
S10.Y4.NW.ST	Trustable Access Mechanisms for Embedded Systems
S11.Y4.HW.NW	Curriculum Development: Embedded System Design using Atom-based Platforms

2011 (YEAR 3) PROJECTS (A=Arizona State, S=Southern Illinois.Year.PI initials)


A1.Y3.KC	A Light-Weight Runtime Multi-Tasking Scheduler for Embedded Multi-Core Architectures
A2.Y3.GF	Statistical Techniques for Property Exploration of Cyber-Physical Systems
A3.Y3.SV.HB	Feasibility of Integrating Memristors & Threshold Logic for Compact, Low Power Digital Circuits
A4.Y3.AS	Programming Non-coherent Cache Architectures
A5.Y3.YHL	Replay-based Program Profiling & Analysis for Embedded Systems
S1.Y3.ST.KS	Distance Estimation to a Transmitter With a Secure Network of Receivers
S2.Y3.ST	Statistical Fault Grading and Diagnosis
S3.Y3.YC.JQ	Development of Fast Grain Quality Measurement System
S4.Y3.JQ	Survey and Assessment of Advanced Haptics Technology
S5.Y3.ST.NW	JTAG-Based Device Security for Embedded System
S6.Y3.ST.HW	Platform for Automated Test and Programming of Embedded System on Module
S7.Y3.NW.HW	Enhancing Embedded Systems Curriculum using Atom-based Platform
S8.Y3.ST	Feasibility Study in Improving the reliability of an MSP430 Embedded System
S9.Y3.DK.HR	Towards Optimal Design of Networking Infrastructure in Bus-based Systems
S10.Y3.SA.JQ.PC	Numerical Modeling of Coupled Thermo-Mechanical Processes
S11.Y3.ST	System Verification Through the Temporal Correctness of its Embedded Cores

2010 (YEAR 2) PROJECTS (A=Arizona State, S=Southern Illinois.Year.PI initials)


A1.Y2.KC	Automated Design and Evaluation of Network-on-Chip Architectures for Communication Centric System-on-Chip Devices
A2.Y2.GF.C	Robust Testing for Networked Control Systems and Mixed-Signal Systems
A3.Y2.YHL.C	Replay Debugging for Multi-threaded and Multi-core Embedded Systems
A4.Y2.AS.C	Memory-Aware Compilation for Modern Multi-core Processors
A5.Y2.KC	Platform Level Dynamic Switching Between Loosely Timed / Approximate Timed SystemC Models
A6.Y2.SV	Modeling and Optimization for Energy Efficient Data Centers
S1.Y2.ST.C	Alien Hardware Detection Through Delay Measurements and Computations
S2.Y2.FH.C	Dielectric Resonator Antennas (DRAs)
S3.Y2.ST.C	GPS-free Distance Estimation to an RF Signal Source
S4.Y2.HW.C	Development of Telemetry Circuit for Sol-gel Sensors
S5.Y2.ST	Error Detection and Correction for Early Latching Technique
S6.Y2.ST	Statistical Fault Grading and Diagnosis
S7.Y2.AC	Development of a Fast Grain Quality Measurement System
S8.Y2.NW	JTAG-based Device Security for Embedded Systems
S9.Y2.JQ	Survey and Assessment of Advanced Haptic Technology
S10.Y2.ST	Platform for Automated Test and Programming on Embedded System on Module

2009 (YEAR 1) PROJECTS (A=Arizona State, S=Southern Illinois.Year.PI initials)


A1.Y1.KC	Design of Image and Signal Processing Algorithms on the Intel Larrabee Platform
A2.Y1.GF	Robust Testing for Networked Control Systems and Mixed-Signal Systems
A3.Y1.YHL	Replay Debugging for Multi-threaded and Multi-core Embedded Systems
A4.Y1.AS	Memory-Aware Compilation for Modern Multi-core Processors
A5.Y1.SV	Modeling and Optimization for Energy Efficient Data Centers
S1.Y1.ST	Alien Hardware Detection Through Delay Measurements and Computations
S2.Y1.FH	Dielectric Resonator Antennas (DRAs)
S3.Y1.ST	GPS-free Distance Estimation to an RF Signal Source
S4.Y1.HW	Development of Telemetry Circuit for Sol-gel Sensors
S5.Y1.ST	Early Clock On-chip Mechanisms and Architectures for Buses

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